Tuning VCP2 and TCP2 Bit Error Rate Performance Inter-Core Communication on TMS320C6474 C6474 (x2) Power Using Modules TMS320C6474 DDR2 Implementation Guidelines (Rev. A) Using the TMS320C6474 Antenna Interface (AIF) for Inter-DSP Communication Connecting Antenna Interface (AIF) With TDM Bridge Chip (IDT 80HFC001) How to Approach Inter-Core Communication on TMS320C6474 Direct I/O Library C6474 (x4) Power Using Modules Migrating from TMS320C6455 to TMS320C6474 TMS320C6474 SERDES Implementation Guidelines TPS40197 Reference Design TMS320C6474 Power Consumption Summary TMS320C6474 Common Bus Architecture (CBA) Throughput TMS320C6474 Multicore Digital Signal Processor Technical Brief TMS320C6474 Module Throughput Application Report TMS320C6474 Hardware Design Guide (Rev. B)